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Course Duration and Modules Covered in course:
1) Advanced Design & ASIC Verification, Duration: 5 months
The course covers the following modules.
1.1) Linux Basics
1.2) Digital Design Concepts
1.3) Verilog + Mini Project on Design
1.4) System Verilog + Mini Project on Verification with SV
1.5) UVM Methodology + Project on Verification with UVM
2) Advanced ASIC Verification, Duration: 4 months
The course covers the following modules.
2.1) System Verilog + Mini Project on Verification with SV
2.2) UVM Methodology + Project on Verification with UVM
3) System Verilog, Duration: 2 months
The course covers the following modules. System Verilog + Project
4) UVM Methodology, Duration: 2 months
The course covers the following modules. UVM Methodology + Project
(Prior knowledge on System Verilog is must for this)
5) System Verilog Assertions, Duration: 1 month
(Prior knowledge on System Verilog is must for this)
6) Protocol Training, Duration: 1 month
We offer training on any one of the Protocols – AHB, AXI, I2C, SPI, PCI, DDR, UART
7) Verilog Training, Duration: 1 month
8) B.E/B.Tech Project on VLSI ASIC Verification
9) M.E/M.Tech Project on VLSI ASIC Verification
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